When a semiconductor device such as a metal-oxide-semiconductor field-effect transistors (MOSFETs) is scaled down through various technology nodes, high k dielectric materials and metals are adopted to form a gate stack. Additionally, a strained silicon is used to enhance the mobility of the transistor channel. In a conventional method, a silicon nitride layer, ion implantation and annealing procedure is implemented to form the strained substrate. On other side, the work function is tuned to improve the device performance. The current approach can damage the high k dielectric material layer and the substrate, considering that the high k dielectric material layer is very thin. Furthermore, the above method to form the strained substrate is difficult to achieve a large stress.